The present invention is related to the transmission of data between integrated circuit devices, and is more particularly related to the termination of CMOS transceiver devices connected to a bi-directional data transmission bus.
In the bi-directional transmission of data over a data bus between two electronic modules, it is typical to terminate the transmission lines of the data bus with resistors to provide proper impedance matching for prevent ringing of the transmission line. In a high speed data transmission system it is desirable to have termination resistors at each end of each transmission line such that voltage level changes are quickly propagated from the transmitting electronic module to the receiving electronic module. However, it is undesirable to terminate both ends of the transmission line throughout the normal period of data transmission because the transmitting electronic module must supply sufficient DC current to drive both of the termination resistors. This current supply results in DC power requirements which must be met by the transmitting electronic module. Where the electronic module is supporting a large number of transmission lines, the DC power requirements which must be met by the electronic module can be considerable. It is not uncommon in transmission systems for an electronic module to be required to drive sixty-four or more transmission lines in a single transmission bus. It is also desirable to include the termination resistor in intimate relationship with the receiver input of the electronic module such that the receiver is not isolated by the package pin inductance of the pin connection between the electronic module and the transmission line.
Japanese Pat. No. 56-79551 to Motoaki Yamazaki for "Bus Line Termination System" discloses in FIG. 1, a terminating resistor inside of the line transceiver device.
U.S. Pat. No. 3,863,024 to Caragliano et al. for "Directional Coupled Data Transmission System" issued Jan. 28, 1975, and discloses a transmission system having a transmitter 10, a receiver 14 and a transmission line 12 therebetween with the transmission line terminated by terminal resistors at the receiver end of the transmission line.
U.S. Pat. No. 4,380,822 to Broton for "Transmit-Receive Switching Circuit For Radio Frequency Circulators" issued Apr. 19, 1983, and discloses a transmit-receive switching circuit wherein a load resistor 151 is shorted out when the circuit is in the receive mode.
U.S. Pat. No. 4,434,497 to Rolfe for "Response Time Bidirectional Circuitry" issued Feb. 28, 1984, and discloses bidirectional circuitry which includes two buses, two interrupt transistors and two amplifiers, each amplifier having a capacitor connected between an input and an output terminal thereof. The bidirectional circuitry acts to provide amplification and/or level shifting of information between two transceivers while also reducing capacitive loading and thus enhancing response time. U.S. Pat. No. 4,443,882 to Rolfe for "Single Terminal Negative Capacitance Generator For Response Time Enhancement" issued Apr. 17, 1984, and discloses a circuit similar to U.S. Pat. No. 4,434,497, but which has a single bus and a single amplifier.
U.S. Pat. No. 4,528,677 to Ise et al. for "Data Transmission System" issued July 9, 1985 and disclosed a data transmission system including a pair of parallel transmission lines, wherein data signals on the transmission lines are applied through a transformer and an associated impedance connected across the lines. The impedance is tuned to the transmission frequency so that it has a very low value during data transmission. A switching means is switched on when signals are transmitted from one of the transmitting stations so that an impedance element does not function either as a load or another transmission system.